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[1]
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S. H. Attarzadeh Niaki and I. Sander.
Semi-formal refinement of heterogeneous embedded systems by foreign
model integration.
In Proceedings of Forum for Design Languages (FDL '11),
Oldenburg, Germany, September 2011.
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design flow, refinement
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[2]
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T. Raudvere, I. Sander, and A. Jantsch.
Synchronization after design refinements with sensitive delay
elements.
In International Conference on Hardware-Software Codesign and
System Synthesis (CODES+ISSS), Salzburg, Austria, October 2007.
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DOI ]
design flow, refinement
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[3]
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Z. Lu, J. Sicking, I. Sander, and A. Jantsch.
Using synchronizers for refining synchronous communication onto
hardware/software architectures.
In Proceedings of the 18th IEEE/IFIP International Workshop on
Rapid System Prototyping (RSP'07), Porto Alegre, Brazil, May 2007.
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DOI ]
design flow, refinement
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[4]
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T. Raudvere, I. Sander, and A. Jantsch.
A synchronization algorithm for local temporal refinements in
perfectly synchronous models with nested feedback loops.
In Proceedings of the 17th Great Lakes Symposium on VLSI
(GLSVLSI '07), pages 353--358, 2007.
[ bib |
DOI ]
design flow, refinement
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[5]
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Z. Lu, I. Sander, and A. Jantsch.
Towards performance-oriented pattern-based refinement of synchronous
models onto NoC communication.
In Proceedings of the 9th Euromicro Conference on Digital System
Design (DSD'06), Dubrovnik, Croatia, August 2006.
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.pdf ]
design flow, refinement
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[6]
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Z. Lu, I. Sander, and A. Jantsch.
Refining synchronous communication onto network-on-chip best-effort
services.
In Advances in Design and Specification Languages for SoCs -
Selected Contributions from FDL 2005. Springer Verlag, April 2006.
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DOI ]
design flow, refinement
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[7]
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Z. Lu, I. Sander, and A. Jantsch.
Refinement of a perfectly synchronous communication model onto
Nostrum NoC best-effort communication.
In Proceedings of the Forum on Specification and Design
Languages (FDL'05), September 2005.
[ bib |
.pdf ]
design flow, refinement
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[8]
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I. Sander and A. Jantsch.
System modeling and transformational design refinement in ForSyDe.
IEEE Transactions on Computer-Aided Design of Integrated
Circuits and Systems, 23(1):17--32, January 2004.
[ bib |
DOI ]
design flow, modeling, refinement
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[9]
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I. Sander, A. Jantsch, and Z. Lu.
Development and application of design transformations in ForSyDe.
IEE Proceedings - Computers & Digital Techniques,
5:313--320, September 2003.
Special Issue - Best of DATE '03.
[ bib |
DOI ]
design flow, refinement
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[10]
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I. Sander.
System Modeling and Design Refinement in ForSyDe.
PhD thesis, Royal Institute of Technology, Stockholm, Sweden, April
2003.
[ bib |
.pdf ]
design flow, modeling, refinement, synthesis
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[11]
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I. Sander, A. Jantsch, and Z. Lu.
Development and application of design transformations in ForSyDe.
In Design, Automation and Test in Europe Conference (DATE
2003), pages 364--369, Munich, Germany, March 2003.
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DOI ]
design flow, refinement
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[12]
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I. Sander and A. Jantsch.
Transformation based communication and clock domain refinement for
system design.
In 39th Design Automation Conference (DAC 2002), pages
281--286, New Orleans, USA, June 2002.
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DOI ]
design flow, refinement
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[13]
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W. Wu, I. Sander, and A. Jantsch.
Transformational system design based on a formal computational model
and skeletons.
In Forum on Design Languages 2000, pages 321--328,
Tübingen, Germany, September 2000.
[ bib |
.pdf ]
design flow, refinement
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