references.bib

@inproceedings{UngSun2019b,
  author = {George Ungureanu and Timmy Sundstr\"{o}m and Anders \r{A}hlander and Ingo Sander and Ingemar S\"{o}derquist},
  booktitle = {2019 Forum for Specification and Design Languages (FDL)},
  title = {Formal Design, Co-Simulation and Validation of a Radar Signal Processing System},
  year = {2019},
  volume = {},
  number = {},
  pages = {1-8},
  keywords = {Computational modeling;Semantics;Complexity theory;Skeleton;Radar signal processing;Analytical models;Radar antennas;system design language;design methodology;radar;simulation;synthesis;model checking},
  url = {https://doi.org/10.1109/FDL.2019.8876905},
  doi = {10.1109/FDL.2019.8876905},
  issn = {},
  month = {Sep.},
  categories = {modeling, design flow, synthesis}
}

@article{BonLou2019a,
  author = {Bonna, Ricardo and Loubach, Denis S. and Ungureanu, George and Sander, Ingo},
  title = {Modeling and Simulation of Dynamic Applications Using Scenario-Aware Dataflow},
  journal = {ACM Trans. Des. Autom. Electron. Syst.},
  issue_date = {August 2019},
  volume = {24},
  number = {5},
  month = aug,
  year = {2019},
  issn = {1084-4309},
  pages = {58:1--58:29},
  articleno = {58},
  numpages = {29},
  url = {http://doi.acm.org/10.1145/3342997},
  doi = {10.1145/3342997},
  acmid = {3342997},
  publisher = {ACM},
  address = {New York, NY, USA},
  keywords = {Scenario-aware dataflow (SADF), modeling, simulation},
  categories = {modeling}
}

@techreport{UngSun2019a,
  author = {George Ungureanu and Timmy Sundstr\"{o}m and Anders \r{A}hlander and Ingo Sander and Ingemar S\"{o}derquist},
  title = {Design of Sensor Signal Processing with {ForSyDe}: Modeling, Validation and Synthesis},
  institution = {KTH Royal Institute of Tehnology},
  year = {2019},
  url = {https://forsyde.github.io/docs/aesa-radar/},
  doi = {10.13140/RG.2.2.21573.81126},
  categories = {modeling, design flow, synthesis}
}

@inproceedings{RosMoh2018a,
  author = {Rosvall, Kathrin and Mohammadat, Tage and Ungureanu, George and {\"O}berg, Johnny and Sander, Ingo},
  booktitle = {2018 21st Euromicro Conference on Digital System Design (DSD)},
  title = {Exploring Power and Throughput for Dataflow Applications on Predictable NoC Multiprocessors},
  year = {2018},
  institution = {KTH, School of Electrical Engineering and Computer Science (EECS)},
  volume = {},
  number = {},
  pages = {719-726},
  abstract = {System level optimization for multiple mixed-criticality applications on shared networked multiprocessor platforms is extremely challenging. Substantial complexity arises from the interdependence between the multiple subproblems of mapping, scheduling and platform configuration under the consideration of several, potentially orthogonal, performance metrics and constraints. Instead of using heuristic algorithms and problem decomposition, novel unified design space exploration (DSE) approaches based on Constraint Programming (CP) have in the recent years shown promising results. The work in this paper takes advantage of the modularity of CP models, in order to support heterogeneous multiprocessor Network-on-Chip (NoC) with Temporally Disjoint Networks (TDNs) aware message injection. The DSE supports a range of design criteria, in particular the optimization and satisfaction of power and throughput. In addition, the DSE now provides a valid configuration for the TDNs that guarantees the performance required to fulfil the design goals. The experiments show the capability of the approach to find low-power and high-throughput designs, and validate a resulting design on a physical TDN-based NoC implementation. },
  doi = {10.1109/DSD.2018.00011},
  issn = {},
  isbn = {978-1-5386-7377-5},
  month = {Aug},
  categories = {analysis and dse}
}

@inproceedings{MedUng2018a,
  author = {Jos\'{e} E. G. de Medeiros and George Ungureanu and Ingo Sander},
  title = {An Algebra for Modeling Continuous Time Systems},
  booktitle = {{D}esign {A}utomation and {T}est in {E}urope ({DATE} 2018)},
  year = {2018},
  optpages = {861-864},
  month = {March},
  address = {Dresden, Germany},
  note = {Accepted for publication as interactive presentation paper},
  optannote = {},
  doi = {10.23919/DATE.2018.8342126},
  categories = {modeling}
}

@inproceedings{UngMed2018a,
  author = {George Ungureanu and Jos\'{e} E. G. de Medeiros and Ingo Sander},
  title = {Bridging Discrete and Continuous Time Models with {Atoms}},
  booktitle = {2018 {D}esign, {A}utomation {T}est in {E}urope Conference Exhibition ({DATE})},
  year = {2018},
  optpages = {277-280},
  month = {March},
  address = {Dresden, Germany},
  note = {Accepted for publication as interactive presentation paper},
  optannote = {},
  doi = {10.23919/DATE.2018.8342019},
  categories = {modeling}
}

@inproceedings{UngSan2017a,
  author = {George Ungureanu and Ingo Sander},
  title = {A Layered Formal Framework for Modeling of Cyber-Physical Systems},
  optcrossref = {},
  booktitle = {{D}esign {A}utomation and {T}est in {E}urope ({DATE} 2017)},
  year = {2017},
  opteditor = {},
  optvolume = {},
  optnumber = {},
  optseries = {},
  optpages = {},
  month = mar,
  address = {Lausanne, Switzerland},
  optorganization = {},
  optpublisher = {},
  optnote = {(accepted for pulication)},
  optannote = {},
  optdoi = {},
  categories = {modeling}
}

@inproceedings{AttSan2017a,
  author = {Seyed-Hosein Attarzadeh-Niaki and Ingo Sander},
  title = {Automatic Construction of Models for Analytic System-Level Design Space Exploration Problems},
  optcrossref = {},
  booktitle = {{D}esign {A}utomation and {T}est in
 {E}urope ({DATE} 2017)},
  year = {2017},
  opteditor = {},
  optvolume = {},
  optnumber = {},
  optseries = {},
  optpages = {},
  month = mar,
  address = {Lausanne, Switzerland},
  optorganization = {},
  optpublisher = {},
  optnote = {(accepted for pulication)},
  optannote = {},
  optdoi = {},
  categories = {analysis and dse}
}

@inproceedings{RosKha2017a,
  author = {Rosvall, Kathrin and Khalilzad, Nima and Ungureanu, George and Sander, Ingo},
  title = {Throughput Propagation in Constraint-Based Design Space Exploration for Mixed-Criticality Systems},
  booktitle = {Proceedings of the 2017 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools},
  series = {RAPIDO '17},
  year = {2017},
  month = {January},
  address = {Stockholm, Sweden},
  optpublisher = {ACM},
  optaddress = {New York, NY, USA},
  categories = {analysis and dse}
}

@article{RosSan2017b,
  author = {Kathrin Rosvall and Ingo Sander},
  title = {Flexible and Trade-Off-Aware Constraint-Based Design Space Exploration for Streaming Applications on Heterogeneous Platforms},
  journal = {ACM Transactions on Design Automation of Electronic Systems (TODAES)},
  year = {2017},
  optvolume = {},
  optnumber = {},
  optpages = {},
  optmonth = {},
  note = {Accepted for publication},
  categories = {analysis and dse},
  optannote = {}
}

@incollection{SanJan2017a,
  author = {Sander, Ingo
and Jantsch, Axel
and Attarzadeh-Niaki, Seyed-Hosein},
  editor = {Ha, Soonhoi
and Teich, J{\"u}rgen},
  title = {{ForSyDe}: System Design Using a Functional Language and Models of Computation},
  booktitle = {Handbook of Hardware/Software Codesign},
  year = {2017},
  publisher = {Springer Netherlands},
  optaddress = {Dordrecht},
  pages = {99--140},
  optabstract = {The ForSyDe methodology aims to push system design to a higher level of abstraction by combining the functional programming paradigm with the theory of Models of Computation (MoCs). A key concept of ForSyDe is the use of higher-order functions as process constructors to create processes. This leads to well-defined and well-structured ForSyDe models and gives a solid base for formal analysis. The book chapter introduces the basic concepts of the ForSyDe modeling framework and presents libraries for several MoCs and MoC interfaces for the modeling of heterogeneous systems, including support for the modeling of run-time reconfigurable processes.},
  optisbn = {978-94-017-7267-9},
  optdoi = {10.1007/978-94-017-7267-9_5},
  opturl = {https://doi.org/10.1007/978-94-017-7267-9_5},
  categories = {design flow, modeling}
}

@inproceedings{KhaRos2016a,
  author = {Nima Khalilzad and Kathrin Rosvall and Ingo Sander},
  title = {A modular design space exploration framework for multiprocessor real-time systems},
  optcrossref = {},
  booktitle = {Forum on Specification and Design Languages (FDL 2016)},
  year = {2016},
  opteditor = {},
  optvolume = {},
  optnumber = {},
  optseries = {},
  optpages = {},
  month = sep,
  address = {Bremen, Germany},
  optorganization = {},
  optpublisher = {},
  optnote = {},
  categories = {analysis and dse},
  optannote = {}
}

@article{AttSan2016a,
  author = {{Seyed-Hosein} {Attarzadeh-Niaki} and Ingo Sander},
  title = {An extensible modeling methodology for embedded and cyber-physical system design},
  journal = {SIMULATION: Transactions of The Society for Modeling and Simulation International},
  year = {2016},
  volume = {92},
  number = {8},
  pages = {771-794},
  optmonth = {},
  optnote = {},
  optannote = {},
  publisher = {SAGE Publications},
  categories = {modeling},
  doi = {10.1177/0037549716659753}
}

@inbook{HjoMen2016a,
  author = {Gabriel Hjort Blindell and Christian Menne and Ingo Sander},
  title = {Languages, Design Methods, and Tools for Electronic System Design},
  chapter = {Synthesizing Code for {GPGPUs} from Abstract Formal Models},
  optcrossref = {},
  year = {2016},
  opteditor = {Oppenheimer, Frank and Medina Pasaje, Julio Luis},
  optvolume = {},
  optnumber = {},
  optseries = {},
  pages = {115--134},
  optmonth = sep,
  optaddress = {Paris, France},
  optorganization = {},
  publisher = {Springer},
  optnote = {},
  categories = {synthesis},
  optannote = {}
}

@inbook{AttAlt2017a,
  author = {Attarzadeh-Niaki, Seyed-Hosein
       and Altinel, Ekrem
       and Koedam, Martijn
       and Molnos, Anca
       and Sander, Ingo
       and Goossens, Kees},
  editor = {Molnos, Anca and Fabre, Christian},
  title = {A Composable and Predictable MPSoC Design Flow for Multiple Real-Time Applications},
  booktitle = {Model-Implementation Fidelity in Cyber Physical System Design},
  year = {2017},
  publisher = {Springer International Publishing},
  address = {Cham},
  pages = {157--174},
  isbn = {978-3-319-47307-9},
  doi = {10.1007/978-3-319-47307-9_6},
  url = {http://dx.doi.org/10.1007/978-3-319-47307-9_6},
  categories = {design flow}
}

@inproceedings{AttSan2015b,
  author = {{Seyed-Hosein} {Attarzadeh-Niaki} and Ingo Sander},
  title = { Integrating functional mock-up units into a formal heterogeneous system modeling framework},
  optcrossref = {},
  booktitle = {International Symposium on Computer Architecture and Digital Systems (CADS)},
  year = {2015},
  opteditor = {},
  optvolume = {},
  optnumber = {},
  optseries = {},
  optpages = {},
  month = oct,
  optaddress = {},
  optorganization = {},
  optpublisher = {},
  note = {},
  optannote = {},
  categories = {modeling},
  doi = {10.1109/CADS.2015.7377784}
}

@inproceedings{DiaAtt2015a,
  author = {{Papa Issa} Diallo and Seyed-Hosein Attarzadeh-Niaki and Francesco Robino and Ingo Sander and Joel Champeau and Johnny Öberg},
  title = {A formal, model-driven design flow for system simulation and multi-core implementation},
  optcrossref = {},
  booktitle = {Symposium on Industrial Embedded Systems (SIES)},
  year = {2015},
  opteditor = {},
  optvolume = {},
  optnumber = {},
  optseries = {},
  optpages = {},
  month = jun,
  address = {Siegen, Germany},
  optorganization = {},
  optpublisher = {},
  optnote = {},
  optannote = {},
  categories = {design flow},
  doi = {10.1109/SIES.2015.7185067}
}

@inproceedings{HerRos2015a,
  author = {Fernando Herrera and Kathrin Rosvall and Ingo Sander and Edoardo Paone and Gianluca Palermo},
  title = {An Efficient Joint Analytical and Simulation-based Design Space Exploration Flow for Predictable Multi-Core Systems },
  optcrossref = {},
  booktitle = {Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO)},
  year = {2015},
  opteditor = {},
  optvolume = {},
  optnumber = {},
  optseries = {},
  optpages = {},
  month = jan,
  address = {Amsterdam, The Netherlands},
  optorganization = {},
  optpublisher = {},
  optnote = {},
  optannote = {},
  categories = {analysis and dse},
  doi = {10.1145/2693433.2693435}
}

@inbook{HerSan2015a,
  author = {Fernando Herrera and Ingo Sander},
  title = {Languages, Design Methods, and Tools for Electronic System Design},
  chapter = {Combining Analytical and Simulation-Based Design Space Exploration for Efficient Time-Critical and Mixed-Criticality Systems},
  optcrossref = {},
  year = {2015},
  opteditor = {},
  optvolume = {},
  optnumber = {},
  optseries = {},
  pages = {167--188},
  optmonth = sep,
  optaddress = {Paris, France},
  optorganization = {},
  publisher = {Springer},
  optnote = {},
  categories = {analysis and dse},
  optannote = {}
}

@inbook{AttMik2015a,
  author = {Attarzadeh Niaki, Seyed Hosein and Marcus Mikulcak and Ingo Sander },
  title = {Languages, Design Methods, and Tools for Electronic System Design},
  chapter = {Automatic Generation of Virtual Prototypes from Platform Templates},
  optcrossref = {},
  year = {2015},
  opteditor = {},
  optvolume = {},
  optnumber = {},
  optseries = {},
  pages = {147--166},
  optmonth = sep,
  optaddress = {Paris, France},
  optorganization = {},
  publisher = {Springer},
  optnote = {},
  categories = {synthesis},
  optannote = {}
}

@inproceedings{HerSan2014,
  author = {Fernando Herrera and Ingo Sander},
  title = {An Extensible Infrastructure for Modeling and Time Analysis of Predictable Embedded Systems},
  optcrossref = {},
  booktitle = {Forum on Specification and Design Languages (FDL 2014)},
  year = {2014},
  opteditor = {},
  optvolume = {},
  optnumber = {},
  optseries = {},
  optpages = {},
  month = oct,
  address = {Munich, Germany},
  optorganization = {},
  optpublisher = {},
  optnote = {},
  optannote = {},
  categories = {modeling, analysis and dse},
  doi = {10.1109/FDL.2014.7119344}
}

@inproceedings{HjoMen2014a,
  author = {Gabriel Hjort Blindell and Christian Menne and Ingo Sander},
  title = {Synthesizing Code for {GPGPUs} from Abstract Formal Models},
  optcrossref = {},
  optkey = {},
  booktitle = {Forum on Specification and Design Languages (FDL 2014)},
  year = {2014},
  opteditor = {},
  optvolume = {},
  optnumber = {},
  optseries = {},
  optpages = {},
  month = oct,
  address = {Munich, Germany},
  optorganization = {},
  optpublisher = {},
  optnote = {},
  optannote = {},
  categories = {synthesis},
  doi = {10.1109/FDL.2014.7119363}
}

@inproceedings{RosSan2014a,
  author = {Kathrin Rosvall and Ingo Sander},
  title = {A Constraint-Based Design Space Exploration Framework for Real-Time Applications on {MPSoCs}},
  optcrossref = {},
  booktitle = {{D}esign {A}utomation and {T}est in
 {E}urope ({DATE} '14)},
  year = {2014},
  opteditor = {},
  optvolume = {},
  optnumber = {},
  optseries = {},
  optpages = {},
  month = mar,
  address = {Dresden, Germany},
  optorganization = {},
  optpublisher = {},
  doi = {10.7873/DATE.2014.339},
  optnote = {},
  categories = {analysis and dse},
  optannote = {}
}

@masterthesis{HjortBlindell504941,
  author = {Hjort Blindell, Gabriel},
  institution = {KTH, School of Information and Communication Technology (ICT)},
  pages = {147},
  school = {KTH, School of Information and Communication Technology (ICT)},
  title = {Synthesizing Software from a ForSyDe Model Targeting {GPGPUs}},
  series = {Trita-ICT-EX},
  number = {13},
  categories = {design flow, synthesis},
  year = {2012}
}

@mastersthesis{Ung2013a,
  author = {Ungureanu, George},
  institution = {KTH, School of Information and Communication Technology (ICT)},
  pages = {151},
  school = {KTH, School of Information and Communication Technology (ICT)},
  title = {Automatic Software Synthesis from High-Level ForSyDe Models Targeting Massively Parallel Processors},
  series = {Trita-ICT-EX},
  number = {2013:139},
  categories = {design flow, synthesis},
  year = {2013}
}

@mastersthesis{Mik2013a,
  author = {Mikulcak, Marcus},
  institution = {KTH, School of Information and Communication Technology (ICT)},
  pages = {146},
  school = {KTH, School of Information and Communication Technology (ICT)},
  title = {Development of a Predictable Hardware Architecture Template and Integration into an Automated System Design Flow},
  year = {2013},
  categories = {design flow, synthesis}
}

@mastersthesis{Alt2013a,
  author = {Altinel, Ekrem},
  institution = {KTH, School of Information and Communication Technology (ICT)},
  pages = {138},
  school = {KTH, School of Information and Communication Technology (ICT)},
  title = {A DESIGN FLOW FOR PREDICTABLE COMPOSABLE SYSTEMS},
  series = {Trita-ICT-EX},
  number = {2013:137},
  year = {2013},
  categories = {design flow, synthesis}
}

@incollection{jantsch:2005c,
  author = { Axel Jantsch },
  title = { Models of Embedded Computation },
  categories = {modeling},
  booktitle = { Embedded Systems Handbook },
  editor = { Richard Zurawski },
  publisher = { CRC Press },
  year = 2005,
  note = {Invited contribution},
  url = {http://www.imit.kth.se/~axel/papers/2005/CRC-chapter.pdf}
}

@book{jantsch:2003c,
  author = {Axel Jantsch},
  title = { Modeling Embedded Systems and {SoCs} - Concurrency and
 Time in Models of Computation },
  publisher = {Morgan Kaufmann Publishers},
  categories = {modeling},
  year = 2003,
  series = {Systems on Silicon },
  month = {June},
  url = {}
}

@inproceedings{AttMik2013a,
  author = {Attarzadeh Niaki, Seyed Hosein and Marcus Mikulcak and Ingo Sander },
  title = {Rapid Virtual Prototyping of Real-Time Systems using Predictable Platform Characterizations},
  optcrossref = {},
  booktitle = {Forum on Specification and Design Languages (FDL 2013)},
  year = {2013},
  opteditor = {},
  optvolume = {},
  optnumber = {},
  optseries = {},
  optpages = {},
  month = sep,
  address = {Paris, France},
  optorganization = {},
  optpublisher = {},
  optnote = {},
  optannote = {},
  categories = {design flow, simulation}
}

@inproceedings{AttSan2013a,
  author = {Attarzadeh Niaki, Seyed Hosein and Ingo Sander},
  title = {An Automated Parallel Simulation Flow for Heterogeneous Embedded Systems},
  optcrossref = {},
  categories = {design flow, simulation},
  booktitle = {Proceedings of {D}esign {A}utomation and {T}est in
 {E}urope ({DATE} '13)},
  pages = {27--30},
  year = {2013},
  opteditor = {},
  optvolume = {},
  optnumber = {},
  optseries = {},
  address = {Grenoble, France},
  month = {March},
  optorganization = {},
  optpublisher = {},
  optnote = {},
  optannote = {}
}

@inproceedings{AttJak2012a,
  author = {Attarzadeh Niaki, {S.H.} and Jakobsen, M.K. and Sulonen, T. and Sander, I.},
  booktitle = {Forum on Specification and Design Languages (FDL 2012)},
  title = {Formal heterogeneous system modeling with {SystemC} },
  year = {2012},
  address = {Vienna, Austria},
  pages = {160--167},
  categories = {modeling},
  keywords = {C++ language;electronic design automation;embedded systems;formal specification;multiprocessing systems;ESL design;SystemC;abstract representation;analysis method;design entry abstraction level;design languages;electronic system level design;embedded systems;executable specification;formal heterogeneous system modeling;formally defined specification;heterogeneous specification;many-core platforms;model specification;multicore platforms;parallel specification;specification detection;synthesis method;Abstracts;Analytical models;Computational modeling;Kernel;Libraries;Semantics;Synchronization;Computer aided engineering;Formal specifications;Modeling;Simulation;System-level design},
  issn = {1636-9874}
}

@inproceedings{BesAtt2012a,
  author = {Beserra, Gilmar Silva and Attarzadeh Niaki, Seyed Hosein and Sander, Ingo},
  booktitle = {Forum on Specification and Design Languages (FDL 2012)},
  title = {Integrating virtual platforms into a heterogeneous {MoC}-based modeling framework},
  year = {2012},
  address = {Vienna, Austria},
  categories = {design flow, simulation},
  pages = {143--150},
  keywords = {data structures;electronic design automation;embedded systems;logic circuits;system buses;virtual machines;ArchC communication;MoC;TLM IP;TLM VP;TLM models;VP;abstraction level;bus-based systems;continuous-time model;design methodologies;design space exploration;embedded systems;heterogeneous MOC-based modeling framework;heterogeneous systems cosimulation;high abstraction level;models of computation;system design;virtual platforms;Adaptation models;Computational modeling;Protocols;Semantics;Software;Time domain analysis;Time varying systems},
  issn = {1636-9874}
}

@inproceedings{AttBes2012a,
  author = {Attarzadeh Niaki, Seyed Hosein and Beserra, Gilmar Silva and Andersen, Nikolaj
 and Verdon, Mathias and Sander, Ingo},
  booktitle = {25th Symposium on Integrated Circuits and Systems Design (SBCCI 2012)},
  title = {Heterogeneous system-level modeling for small and medium enterprises},
  year = {2012},
  pages = {1--6},
  address = {Brasilia, Brazil},
  categories = {modeling},
  keywords = {C++ language;design;embedded systems;formal specification;formal verification;small-to-medium enterprises;SME;SystemC;UART-based protocol;design practice;design scenario;electronic embedded system;heterogeneous system-level modeling;impulse-radio radar;small-and-medium enterprise;system-level design approach;Analytical models;Companies;Computational modeling;Consumer electronics;Embedded systems;Semantics},
  doi = {10.1109/SBCCI.2012.6344450}
}

@article{ZhuSan2012a,
  author = {Zhu, Jun and Sander, Ingo and Jantsch, Axel},
  title = {Performance Analysis of Reconfigurations in Adaptive Real-Time Streaming Applications},
  journal = {ACM Transactions on Embedded Computing Systems},
  issue_date = {June 2012},
  volume = {11S},
  number = {1},
  month = jun,
  year = {2012},
  issn = {1539-9087},
  pages = {12:1--12:20},
  articleno = {12},
  numpages = {20},
  url = {http://doi.acm.org/10.1145/2180887.2180888},
  doi = {10.1145/2180887.2180888},
  acmid = {2180888},
  publisher = {ACM},
  address = {New York, NY, USA},
  keywords = {analysis and dse, reconfiguration, runtime reconfigurable FPGAs, streaming applications, synchronous data flow},
  categories = {design flow, analysis and dse}
}

@inproceedings{JakMad2012a,
  author = {Mikkel Koefoed Jakobsen and Jan Madsen and Attarzadeh Niaki, Seyed Hosein and Ingo Sander and Jan Hansen},
  title = {System level modelling with open source tools},
  optcrossref = {},
  categories = {modeling},
  booktitle = {Embedded World},
  optpages = {},
  year = {2012},
  opteditor = {},
  optvolume = {},
  optnumber = {},
  optseries = {},
  address = {Nuremberg, Germany},
  month = {February},
  optorganization = {},
  optpublisher = {},
  optnote = {},
  optannote = {},
  pdf = {http://web.it.kth.se/~ingo/Papers/emworld-2012.pdf}
}

@inproceedings{AttSan2011b,
  title = {Semi-Formal Refinement of Heterogeneous Embedded Systems by Foreign Model Integration},
  booktitle = {Proceedings of Forum for Design Languages (FDL '11)},
  address = {Oldenburg, Germany},
  month = {September},
  pubtype = {inProceedings},
  year = {2011},
  author = {Attarzadeh Niaki, Seyed Hosein and Sander, Ingo},
  categories = {design flow, refinement}
}

@inproceedings{AttSan2011a,
  title = {Co-simulation of embedded systems in a heterogeneous {MoC-based} modeling framework},
  isbn = {978-1-61284-818-1},
  doi = {10.1109/SIES.2011.5953667},
  abstract = {New design methodologies and modeling frameworks are required to provide a solution for integrating legacy code and {IP} models in order to be accepted in the industry. To tackle this problem, we introduce the concept of wrappers in the context of a formal heterogeneous embedded system modeling framework. The formalism is based on the language-independent concept of models of computation. Wrappers enable the framework to co-simulate/co-execute with external models which might be legacy code, an {IP} block, or an implementation of a partially refined system. They are defined formally in order to keep the analyzability of the original framework and also enable automations such as generation of model wrappers and co-simulation interfaces. As a proof of concept, three wrappers for models in different abstraction levels are introduced and implemented for two case studies.},
  booktitle = {6th {IEEE} International Symposium on Industrial Embedded Systems {(SIES 2011)}},
  publisher = {{IEEE}},
  author = {Attarzadeh Niaki, Seyed Hosein and Sander, Ingo},
  month = {June},
  year = {2011},
  keywords = {Adaptation models, Computational modeling, Computer architecture, embedded systems, Engines, Semantics, synchronization},
  pages = {238--247},
  categories = {design flow, simulation}
}

@inproceedings{ZhuFDL10,
  title = {Het{M}o{C}: heterogeneous modelling in {S}ystem{C}},
  booktitle = {Proceedings of Forum for Design Languages (FDL '10)},
  address = {Southampton, UK},
  month = {September},
  pdf = {http://web.it.kth.se/~junz/publications/fdl10_zhu.pdf},
  pubtype = {inProceedings},
  year = {2010},
  author = {Zhu, Jun and Sander, Ingo and Jantsch, Axel},
  categories = {modeling}
}

@inproceedings{ZhuDATE10,
  author = {Jun Zhu and Ingo Sander and Axel Jantsch},
  title = {{Pareto} Efficient Design for Reconfigurable Streaming
 Applications on {CPU/FPGAs}},
  booktitle = {{D}esign {A}utomation and {T}est in
 {E}urope ({DATE} '10)},
  address = {Dresden, Germany},
  note = {},
  month = {March},
  year = 2010,
  categories = {design flow, analysis and dse},
  url = {http://web.it.kth.se/~ingo/Papers/date10_zhu.pdf}
}

@inproceedings{ZhuASPDAC10,
  author = {Jun Zhu and Ingo Sander and Axel Jantsch},
  title = {Constrained Global Scheduling of Streaming
 Applications on {MPSoCs}},
  booktitle = {{A}sia {S}outh
 {P}acific {D}esign {A}utomation {C}onference ({ASP}-{DAC} '10)},
  optaddress = {Taipei, Republic of China},
  optmonth = {January},
  year = 2010,
  categories = {design flow, analysis and dse},
  doi = {10.1109/ASPDAC.2010.5419892},
  opturl = {http://web.it.kth.se/~ingo/Papers/aspdac10_zhu.pdf}
}

@inproceedings{SanZhu2009a,
  author = {Ingo Sander and Jun Zhu and Axel Jantsch and Andreas Herrholz and
 Philipp A. Hartmann and Wolfgang Nebel},
  title = {High-level estimation and trade-off analysis for adaptive real-time
 systems},
  booktitle = {Proceedings of the 16th Reconfigurable Architectures Workshop (RAW 2009)},
  year = {2009},
  address = {Rome, Italy},
  month = {May},
  pages = {1--4},
  note = {},
  categories = {design flow, adaptivity, analysis and dse},
  doi = {10.1109/IPDPS.2009.5161208},
  opturl = {http://web.it.kth.se/~ingo/Papers/RAW2009-Estimation.pdf}
}

@inproceedings{ZhuSan2009a,
  author = {Jun Zhu and Ingo Sander and Axel Jantsch},
  title = {Buffer Minimization of Real-Time Streaming Applications on Hybrid
 {CPU/FPGA}},
  booktitle = {Design Automation and Test in Europe (DATE'09)},
  year = {2009},
  address = {Nice, France},
  categories = {design flow, analysis and dse},
  pages = {1506--1511},
  url = {http://web.it.kth.se/~ingo/Papers/DATE2009-BufferMinimization.pdf}
}

@article{RauSan2008a,
  author = {Tarvo Raudvere and Ingo Sander and Axel Jantsch},
  title = {Application and Verification of Local Non-Semantic-Preserving Transformations
 in System Design},
  journal = {{IEEE Transactions on Computer-Aided Design of Integrated Circuits
 and Systems}},
  year = {2008},
  volume = {27},
  pages = {1091--1103},
  number = {6},
  month = {June},
  categories = {design flow, verification},
  doi = {10.1109/TCAD.2008.923249},
  opturl = {http://web.it.kth.se/~ingo/Papers/TCAD_Raudvere2008.pdf}
}

@article{SanJan2008a,
  author = {Ingo Sander and Axel Jantsch},
  title = {Modelling Adaptive Systems in {ForSyDe}},
  journal = {Electronic Notes in Theoretical Computer Science (ENTCS)},
  year = {2008},
  volume = {200},
  pages = {39--54},
  number = {2},
  note = {First Workshop on Verification of Adaptive Systems (VerAS 2007)},
  address = {Amsterdam, The Netherlands, The Netherlands},
  doi = {http://dx.doi.org/10.1016/j.entcs.2008.02.011},
  issn = {1571-0661},
  categories = {modeling, adaptivity},
  publisher = {Elsevier Science Publishers B. V.},
  url = {http://web.it.kth.se/~ingo/Papers/ENTCS2008.pdf}
}

@inproceedings{ZhuSan2008a,
  author = {Jun Zhu and Ingo Sander and Axel Jantsch},
  title = {Energy efficient streaming applications with guaranteed throughput
 on {MPSoCs}},
  booktitle = {Proceedings of the International Conference on Embedded Software
 (EMSOFT'08)},
  year = {2008},
  address = {Atlanta, USA},
  month = {October},
  doi = {10.1109/ESTMED.2008.4696995},
  opturl = {http://web.it.kth.se/~ingo/Papers/emsoft08_zhu.pdf},
  categories = {design flow, analysis and dse},
  pubtype = {inProceedings}
}

@inproceedings{ZhuSan2008b,
  author = {Jun Zhu and Ingo Sander and Axel Jantsch},
  title = {Performance analysis of reconfiguration in adaptive real-time streaming
 applications},
  booktitle = {Proceedings of the 6th Workshop on Embedded Systems for Real-Time
 Multimedia (ESTIMedia'08)},
  year = {2008},
  address = {Atlanta, USA},
  month = {October},
  url = {http://web.it.kth.se/~ingo/Papers/estimedia08_zhu.pdf},
  categories = {design flow, analysis and dse},
  pubtype = {inProceedings}
}

@inproceedings{LuSic2007a,
  author = {Zhonghai Lu and Jonas Sicking and Ingo Sander and Axel Jantsch},
  title = {Using synchronizers for refining synchronous communication onto hardware/software
 architectures},
  booktitle = {Proceedings of the 18th IEEE/IFIP International Workshop on Rapid
 System Prototyping (RSP'07)},
  year = {2007},
  address = {Porto Alegre, Brazil},
  month = {May},
  categories = {design flow, refinement},
  doi = {10.1109/RSP.2007.38},
  opturl = {http://web.it.kth.se/~ingo/Papers/RSP2007-Synchronizers.pdf}
}

@inproceedings{RauSan2007a,
  author = {Tarvo Raudvere and Ingo Sander and Axel Jantsch},
  title = {A synchronization algorithm for local temporal refinements in perfectly
 synchronous models with nested feedback loops},
  booktitle = {Proceedings of the 17th Great Lakes Symposium on VLSI (GLSVLSI '07)},
  year = {2007},
  pages = {353-358},
  categories = {design flow, refinement},
  doi = {10.1145/1228784.1228869},
  opturl = {http://web.it.kth.se/~ingo/Papers/GLSVLSI2007-Synchronization.pdf}
}

@inproceedings{RauSan2007b,
  author = {Tarvo Raudvere and Ingo Sander and Axel Jantsch},
  title = {Synchronization after design refinements with sensitive delay elements},
  booktitle = {International Conference on Hardware-Software Codesign and System
 Synthesis (CODES+ISSS)},
  year = {2007},
  address = {Salzburg, Austria},
  month = {October},
  categories = {design flow, refinement},
  doi = {10.1145/513918.513992},
  opturl = {http://web.it.kth.se/~ingo/Papers/CODES2007-Synchronization.pdf}
}

@incollection{LuSan2006a,
  author = {Zhonghai Lu and Ingo Sander and Axel Jantsch},
  title = {Refining synchronous communication onto network-on-chip best-effort
 services.},
  booktitle = {Advances in Design and Specification Languages for {SoCs} - Selected
 Contributions from {FDL} 2005},
  publisher = {Springer Verlag},
  year = {2006},
  month = {April},
  categories = {design flow, refinement},
  doi = {10.1109/DSD.2006.89},
  opturl = {http://web.it.kth.se/~ingo/Papers/FDL-Book2006-Refinement.pdf}
}

@inproceedings{LuSan2006b,
  author = {Zhonghai Lu and Ingo Sander and Axel Jantsch},
  title = {Towards performance-oriented pattern-based refinement of synchronous
 models onto {NoC} communication},
  booktitle = {Proceedings of the 9th Euromicro Conference on Digital System Design (DSD'06)},
  year = {2006},
  address = {Dubrovnik, Croatia},
  month = {August},
  categories = {design flow, refinement},
  url = {http://web.it.kth.se/~ingo/Papers/DSD2006-Refinement.pdf}
}

@incollection{JanSan2005b,
  author = {Axel Jantsch and Ingo Sander},
  title = {Models of computation in the design process},
  booktitle = {SoC: Next Generation Electronics},
  publisher = {IEE},
  year = {2005},
  editor = {Bashir M Al-Hashimi},
  note = {Invited contribution},
  categories = {modeling},
  url = {http://web.it.kth.se/~ingo/Papers/IEE2005-Book.pdf}
}

@article{JanSan2005a,
  author = {Axel Jantsch and Ingo Sander},
  title = {Models of computation and languages for embedded system design},
  journal = {IEE Proceedings on Computers and Digital Techniques},
  year = {2005},
  volume = {152},
  pages = {114--129},
  number = {2},
  month = mar,
  optnote = {Special issue on Electronic System Design},
  categories = {modeling},
  opturl = {http://web.it.kth.se/~ingo/Papers/IEE2005-Proceedings.pdf},
  doi = {10.1049/ip-cdt:20045098}
}

@inproceedings{LuSan2005a,
  author = {Zhonghai Lu and Ingo Sander and Axel Jantsch},
  title = {Refinement of a perfectly synchronous communication model onto {Nostrum
 NoC} best-effort communication},
  booktitle = {Proceedings of the Forum on Specification and Design Languages (FDL'05)},
  year = {2005},
  month = {September},
  categories = {design flow, refinement},
  url = {http://web.it.kth.se/~ingo/Papers/FDL2005-Refinement.pdf},
  where = {Lausanne, Switzerland}
}

@inproceedings{RauSin2005a,
  author = {Tarvo Raudvere and Ashish Kumar Singh and Ingo Sander and Axel Jantsch},
  title = {System level verification of digital signal processing applications
 based on the polynomial abstraction technique},
  booktitle = {International Conference on Computer Aided Design (ICCAD 2005)},
  year = {2005},
  month = {November},
  where = {San Jose, California, USA},
  categories = {design flow, verification},
  doi = {10.1109/ICCAD.2005.1560080},
  opturl = {http://web.it.kth.se/~ingo/Papers/ICCAD_2005.pdf}
}

@inproceedings{RauSin2004a,
  author = {Tarvo Raudvere and Ashish Kumar Singh and Ingo Sander and Axel Jantsch},
  title = {Polynomial abstraction for verification of sequentially implemented
 combinational circuits},
  booktitle = {Design, Automation and Test in Europe Conference (DATE 2004)},
  year = {2004},
  address = {Paris, France},
  month = {February},
  categories = {design flow, verification},
  doi = {10.1109/DATE.2004.1268933},
  opturl = {http://web.it.kth.se/~ingo/Papers/DATE2004-Polynomial.pdf}
}

@article{SanJan2004a,
  author = {Ingo Sander and Axel Jantsch},
  title = {System Modeling and Transformational Design Refinement in {ForSyDe}},
  journal = {{IEEE Transactions on Computer-Aided Design of Integrated Circuits
 and Systems}},
  year = {2004},
  volume = {23},
  pages = {17--32},
  number = {1},
  month = {January},
  categories = {design flow, modeling, refinement},
  doi = {10.1109/TCAD.2003.819898},
  opturl = {http://web.it.kth.se/~ingo/Papers/TCAD2004_SystemModeling.pdf},
  where = {E.21}
}

@inproceedings{RauSan2003a,
  author = {Tarvo Raudvere and Ingo Sander and Ashish Kumar Singh and Axel Jantsch},
  title = {Verification of design decisions in {ForSyDe}},
  booktitle = {Proceedings of the 1st International Conference on Hardware - Software
 Codesign and System Synthesis (CODES+ISSS)},
  year = {2003},
  address = {Newport Beach, California, USA},
  month = {October},
  categories = {design flow, verification},
  doi = {10.1145/944645.944692},
  opturl = {http://web.it.kth.se/~ingo/Papers/CODES2003-Verification.pdf}
}

@phdthesis{San2003a,
  author = {Ingo Sander},
  title = {System Modeling and Design Refinement in {ForSyDe}},
  school = {Royal Institute of Technology},
  year = {2003},
  address = {Stockholm, Sweden},
  month = {April},
  categories = {design flow, modeling, refinement, synthesis},
  url = {http://web.it.kth.se/~ingo/Papers/Thesis_Sander_2003.pdf}
}

@inproceedings{SanJan2003a,
  author = {Ingo Sander and Axel Jantsch and Zhonghai Lu},
  title = {Development and Application of Design Transformations in {ForSyDe}},
  booktitle = {Design, Automation and Test in Europe Conference (DATE 2003)},
  year = {2003},
  pages = {364--369},
  address = {Munich, Germany},
  month = {March},
  categories = {design flow, refinement},
  doi = {10.1109/DATE.2003.1253635},
  opturl = {http://web.it.kth.se/~ingo/Papers/DATE2003.pdf},
  where = {B.23}
}

@article{SanJan2003b,
  author = {Ingo Sander and Axel Jantsch and Zhonghai Lu},
  title = {Development and Application of Design Transformations in {ForSyDe}},
  journal = {{IEE} Proceedings - Computers \& Digital Techniques},
  year = {2003},
  volume = {5},
  pages = {313--320},
  month = {September},
  note = {Special Issue - Best of DATE '03},
  categories = {design flow, refinement},
  doi = {10.1049/ip-cdt:20030836},
  opturl = {http://web.it.kth.se/~ingo/Papers/CDT2004_Development.pdf},
  where = {E.20}
}

@inproceedings{LuSan2002a,
  author = {Zhonghai Lu and Ingo Sander and Axel Jantsch},
  title = {A Case Study of Hardware and Software Synthesis in {ForSyDe}},
  booktitle = {Proceedings of the 15th International Symposium on System Synthesis},
  year = {2002},
  pages = {86--91},
  address = {Kyoto, Japan},
  month = {October},
  opturl = {http://web.it.kth.se/~ingo/Papers/ISSS2002.pdf},
  doi = {10.1145/581199.581219},
  where = {B.6},
  categories = {design flow, synthesis}
}

@inproceedings{SanJan2002b,
  author = {Ingo Sander and Axel Jantsch},
  title = {Transformation Based Communication and Clock Domain Refinement for
 System Design},
  booktitle = {39th Design Automation Conference ({DAC 2002})},
  year = {2002},
  pages = {281--286},
  address = {New Orleans, {USA}},
  month = {June},
  categories = {design flow, refinement},
  doi = {10.1145/513918.513992},
  opturl = {http://web.it.kth.se/~ingo/Papers/DAC2002.pdf},
  where = {B.5}
}

@inproceedings{JanSan2001,
  author = {Axel Jantsch and Ingo Sander and Wenbiao Wu},
  title = {The usage of stochastic processes in embedded system specifications},
  booktitle = {Proceedings of the Ninth International Symposium on Hardware/Software
 Codesign},
  year = {2001},
  pages = {5--10},
  address = {Copenhagen, Denmark},
  month = {April},
  where = {B.11},
  categories = {modeling},
  doi = {10.1145/371636.371646},
  opturl = {http://web.it.kth.se/~ingo/Papers/CODES2001-StochasticProcesses.pdf}
}

@inproceedings{JanSan2000,
  author = { Axel Jantsch and Ingo Sander },
  title = { On the Roles of Functions and Objects in System Specification },
  booktitle = { Proceedings of the International Workshop on Hardware/Software Codesign},
  year = {2000},
  pages = {8--12},
  address = {San Diego, CA, USA},
  where = {B.12},
  categories = {modeling},
  doi = {10.1145/334012.334014},
  opturl = {http://web.it.kth.se/~ingo/Papers/CODES2000_Roles.pdf}
}

@inproceedings{WuSan2000,
  author = {Wenbiao Wu and Ingo Sander and Axel Jantsch},
  title = {Transformational System Design Based on a Formal Computational Model
 and Skeletons},
  booktitle = {Forum on Design Languages 2000},
  year = {2000},
  pages = {321--328},
  address = {T\"{u}bingen, Germany},
  month = {September},
  url = {http://web.it.kth.se/~ingo/Papers/FDL2000_TransformationalDesign.pdf},
  where = {B.7},
  categories = {design flow, refinement}
}

@inproceedings{SanJan1999a,
  author = {Ingo Sander and Axel Jantsch},
  title = {Formal System Design Based on the Synchrony Hypothesis, Functional Models, and Skeletons},
  booktitle = {Proceedings of the 12th international conference on {VLSI} Design},
  year = {1999},
  pages = {318-323},
  address = {Goa, India},
  month = {January},
  categories = {design flow, modeling},
  publisher = {{IEEE Computer Society}},
  opturl = {http://web.it.kth.se/~ingo/Papers/VLSI1999_FormalSystemDesign.pdf},
  doi = {10.1109/ICVD.1999.745170},
  where = {B.9}
}

@inproceedings{SanJan1999b,
  author = {Ingo Sander and Axel Jantsch},
  title = {System Synthesis Based on a Formal Computational Model and Skeletons},
  booktitle = {Proceedings {IEEE} Workshop on {VLSI}'99},
  year = {1999},
  pages = {32--39},
  address = {Orlando, Florida, USA},
  month = {April},
  publisher = {{IEEE Computer Society}},
  categories = {design flow, synthesis},
  doi = {10.1109/TCAD.2003.819898},
  opturl = {http://web.it.kth.se/~ingo/Papers/WVLSI1999_SystemSynthesis.pdf},
  where = {B.10}
}

@inproceedings{SanJan1999c,
  author = {Ingo Sander and Axel Jantsch},
  title = {System Synthesis Utilizing a Layered Functional Model},
  booktitle = {Proceedings Seventh International Workshop on Hardware/Software Codesign},
  year = {1999},
  pages = {136--140},
  address = {Rome, Italy},
  month = {May},
  publisher = {ACM Press},
  categories = {design flow, synthesis},
  doi = {10.1145/301177.301510},
  opturl = {http://web.it.kth.se/~ingo/Papers/CODES1999_SystemSynthesisLayeredFunctionalModel.pdf},
  where = {B.8}
}

@mastersthesis{Aco2007a,
  author = {Alfonso Acosta},
  title = {Hardware synthesis in {ForSyDe}},
  school = {School for Information and Communication Technology, Royal Institute
 of Technology (KTH)},
  year = {2007},
  address = {Stockholm, Sweden},
  note = {KTH/ICT/ECS-2007-81},
  categories = {design flow, synthesis},
  url = {http://web.it.kth.se/~ingo/Papers/ThesisAlfonsoAcosta2007.pdf}
}