New IDeSyDe and ForSyDe IO releases
We are happy to annouce the newer releases of IDeSyDe and ForSyDe IO. These newest releases enables you to solve DSE scenarios where the applications are modelled as SDF graphs and the platform contains FPGA elements which can host actors synthetized as ASICs. Naturally, this happens at the system-level, which...
IDeSyDe: latest releases and publications
IDeSyDe 0.5.9 has been released. It has many changes since the last update in October 2022, including a multi-modular architecture that enables dynamic use of identification and exploration modules. Check out the releases and the documentation for more information. This latest release is also featured in DASC...
IDeSyDe and ForSyDe IO: latest releases and publications
Since 2019 we have been developing two new entries in the tools ecosystem, based on lessons learned from previous years and tools. These two entries are IDeSyDe and ForSyDe IO. IDeSyDe is the current design space exploration tool in ForSyDe design flow. It is based on...
ForSyDe lives!
It has been a long time since we last posted here. Luckily, it was for all the good reasons! The major one is research. Sometimes a deep focus is required. And sadly, that might mean long hiatus between front-page updates. Here are some noteworthy news since Sept. 2019, the date...
FDL2019 Best Paper Award
We are happy to announce that our paper got the “Best Paper Award” at the Forum on specification & Design Languages (FDL2019) in Southampton, United Kingdomm on September 2-4, 2019: George Ungureanu, Timmy Sundström, Anders Åhlander, Ingo Sander and Ingemar Söderquist. 2019. Formal Design, Co-Simulation and Validation of a...
ACM TODAES Paper
We are happy to announce that the following paper has been published in ACM Transactions on Design Automation of Electronic Systems (TODAES): Ricardo Bonna, Denis S. Loubach, George Ungureanu, and Ingo Sander. 2019. Modeling and Simulation of Dynamic Applications Using Scenario-Aware Dataflow. ACM Trans. Des. Autom. Electron. Syst. 24,...
DeSyDe 0.3.0 Release
A new version of DeSyDe has been released recently, compatible with and supporting our latest DSD’18 publication: K. Rosvall et al., ‘Exploring Power and Throughput for Dataflow Applications on Predictable NoC Multiprocessors’. This version is accompanied by: a reproducible set of experiments, as presented in the DSD’18...
New web pages and tool releases
The ForSyDe Web Site is Growing We conclude a very busy and intense year, 2018, with announcing some new web content which has finally been compiled together or migrated from old repositories. We are still in the (long) process of exposing and documenting our tools and methods better, and...
ForSyDe-Shallow 3.3.3.0 Update
ForSyDe-Shallow Update ForSyDe-Shallow has been updated to version 3.3.3, which adds the following features: a modeling library for the scenario-aware dataflow (SADF) MoC a modeling library for the cyclo-static data flow (CSDF) MoC Currently, this version of ForSyDe-Shallow is only available as a nightly build. We...
DSD/SEAA 2018 Paper
We have presented the following paper at the Euromicro DSD/SEAA 2018 conference which took place in Prague, Czech Republic, between the 29th and the 30th of August: Kathrin Rosvall, Tage Mohammadat, George Ungureanu, Johnny Öberg and Ingo Sander. 2018. Exploring Power and Throughput for Dataflow Applications on Predictable NoC...
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